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4 until number found or BC=0 3 DEFM " ADD HL,HL 2 the number 2 pointer incremented and repeated 2 pointer incremented 2 pointer decremented and repeated 2 pointer decremented 2 EX AF,AF' 2 DJNZ LOOP 1 ve number we can holdin a single register, using this notationis 0 1 transfer (HL) to (DE), increment HL and DE, decrement BC, set PV flag if BC=0 1 transfer (HL) to (DE), decrement HL, DE, and BC, set PV flag if BC=0 1 the port whose number is in C 1 the memory location (IY) 1 the memory location (IX) 1 the memory location (DE) 1 the memory location (BC) 1 the location (HL) 1 the contents of the Accumulator is eXclusively ORed with 1 the contents of 1 the computer is HALTed until an interrupt comes to awake it again 1 the carry flag is set, ie Set Carry Flag 1 the carry flag is inverted, ie Compliment Carry Flag 1 the alternative AF registers 1 the accumulator is ComPared with 1 the Stack Pointer 1 the Refresh register 1 the RETurn address is POPped from the stack 1 the L register 1 the Interrupt vector register 1 the IY register 1 the IX register 1 the HL register 1 the H register 1 the Flag register 1 the E register 1 the DE register 1 the D register 1 the C register 1 the BC, DE, HL registers are all EXchanged with the alternative set 1 the BC register 1 the B register 1 the Accumulator is logically ORed with 1 the Accumulator is logically ANDed with 1 the Accumulator is NEGated, ie made negative 1 the Accumulator 1 the AF registers 1 search from (HL) Incrementing BC bytes for data in Accumulator 1 search from (HL) Decrementing BC bytes for data in Accumulator 1 rotate the accumulator and carry Right 1 rotate the Accumulator and carry Left 1 rotate the Accumulator Right, shifting bit 0 into Carry 1 rotate the Accumulator Left shifting bit 7 into Carry 1 rotate Right Decimal contents of (HL) with least significant end of Accumulator 1 rotate Left Decimal contents of (HL) with least significant end of Accumulator 1 reSTart at address 1 push the return address to stack and CALL 1 port with the above number 1 perform relative jump to 1 perform jump to 1 output from (HL) to port (C) increment HL, decrement B 1 ouTput to port (C), from block from (HL) Decrementing HL for B bytes 1 ouTput from (HL) to port (C) block from (HL) Incrementing for B bytes 1 oUTput from (HL) to port (C) Decrement HL, decrement B 1 memory location 1 location (IY+offset) 1 location (IX+offset) 1 is loaded with 1 is Shifted Right Logically, 0 is shifted into bit 7 1 is Shifted Right Arithmetically, sign bit unchanged 1 is Shifted Left Arithmetically, 0 is shifted into bit 0 1 is Rotated Right, shifting bit 0 into Carry 1 is Rotated Left shifting bit 7 into Carry 1 is PUSHed onto the stack and the SP decremented by 2 1 is POPped from the stack and the SP incremented by 2 1 is INCremented by 1 1 is EXchanged with 1 is DECremented by 1 1 invert all bits in A register, ie ComPLiment 1 input data from 1 if the Zero flag is set, 1 if the Zero flag is not set, 1 if the Sign flag is set, ie Minus, 1 if the Sign flag is not set, ie Positive, 1 if the Parity flag is sEt, ie Parity is Even, 1 if the Parity flag is nOt set, ie Parity is Odd, 1 if the Carry flag is set, 1 if the Carry flag is not set, 1 iNput into (HL) from port (C) increment HL, decrement B 1 iNput into (HL) from port (C) Decrement HL, decrement B 1 iNput from port (C), into block from (HL) Incrementing HL for B bytes 1 iNput from port (C), into block from (HL) Decrementing HL for B bytes 1 has taken from it the carry and 1 has added to it the carry and 1 has added to it 1 enable Interrupts. NOT PERFORMED BY SIMULATOR. 1 disable Interrupts. NOT PERFORMED BY SIMULATOR. 1 decrement B, if zero continue, if Not Zero perform relative jump to 1 decimal Adjust Accumulator 1 compare (HL) with A, increment HL, decrement BC 1 compare (HL) with A, decrement HL, and BC 1 change Interrupt Mode to 1 block transfer (BC) bytes starting at (HL) to (DE) incrementing 1 block transfer (BC) bytes starting at (HL) to (DE) decrementing 1 and Carry are rotated Left 1 and Carry are Rotated Right 1 With an identical set for IY 1 Three types, or modes, of maskableinterrupts are available. 1 The Accumulator has subtracted from it 1 The programmer can arrange that maskableinterrupts (MI) are ignored. Within theZ80 there is a flag, the interrupt enableflag, that can be set and cleared.Depending upon the state of this flag MIwill be accepted or ignored. 1 The instruction should transfer thecontents of the block of memory 1000-2000 to memory locations 1500-2500.Unfortunately the first step transfersthe contents of 1000 to 1500. By the timeit is the turn of location 1500 to betransferred it has already beenoverwritten in the first step. 1 Space missing 1 SUB (IX+d) 1 SLA (IX+d) SRA (IX+d) SRL (IX+d) 1 SET N (IX+d) RES N,(IX+d) BIT N,(IX+d) 1 SBC A,(IX+d) CP (IX+d) 1 RST n where n = 00H, 08H, 10H, 18H, 20H, 1 RR (IX+d) 1 RLC (IX+d) RL (IX+d) RRC (IX+d) 1 RETurn from Non-maskable interrupt: NOT PERFORMED BY SIMULATOR 1 RETurn from Interrupt: NOT PERFORMED BY SIMULATOR 1 Offset too big 1 Offset missing 1 Number too large 1 Number missing 1 No OPeration is performed, inspite of this it takes . 1 No DEFB, or DEFW 1 NOT DEFINED 1 Missing space or , 1 Label too long 1 Label not found 1 LD r,(IX+d) LD IX,nn 1 LD (IX+d),r LD IX,(nn) 1 LD (IX+d),n LD (nn),IX EX (SP),IX 1 Instruction unknown 1 IN A,(n) where n is the number of the 1 HL =1999 DE = 2499 and BC = 1000 andusing the LDDR instruction, the same blockwill be transferred to the same memorylocations without this problem. 1 HL = 1000 DE = 1500 and BC = 1000. 1 FLAGS$ Registers and Contents % STAC 1 Error after inst. 1 EX5B:DEFM " LD HL,(STORE) 1 DEFM "using this instruction. 1 DEFM "using addition to successively multiply by" 1 DEFM "the only instruction that deals with the" 1 DEFM "the Spectrum keyboard is interrogated" 1 DEFM "port is loaded into register r. Reading" 1 DEFM "number held in the HL register pair by 10" 1 DEFM "data is transferred into the processor. 1 DEFM "are affected by this instruction and no" 1 DEFM "Parity flags. The instruction IN F, (C) is" 1 DEFM "IN r,(C), but the contents of the register" 1 DEFM "Flag register separately. Only the flags" 1 DEFM " OUT (C), r is a similar instruction to" 1 DEFM " IN r, (C) affect the Zero, Sign, and" 1 DEFM " LD DE,(STORE) 1 DEFM " LD (STORE),HL 1 DEFM " ADD HL,DE 1 Cursor keys, delete, and auto-repeat are as standard. BREAK returns you to menu. 1 Can only ADD IX/IY 1 Bracket missing 1 ADDRESS MACHINE CODE 1 ADD A,(IX+d) INC (IX+d) AND (IX+d) 1 ADC A,(IX+d) DEC (IX+d) OR (IX+d) 1 ADC HL,dd SBC HL,dd and EX DE,HL arethe only exceptions. 1 1 or 127 and the largestnegative number 1 1 01 seconds to do it 1 0 or -128. 1 .LDI,LDIR,LDD,LDDR 1 .INI,INIR,IND,INDR 1 .CPI,CPIR,CPD,CPDR 1 *^.^;^B^F^M^W^^^e^u^|^ 1 (viii)Return from interrupt (RETI). 1 (vii) Enables interrupts 1 (vi) POP or EXchange registers. 1 (v) Disable interrupt if required. 1 (iv) Do interrupt routine. 1 (ii ) PUSH or EXchange required registered(iii) Enables interrupt if required. 1 (i) Enter maskable interrupt, interrupts 1 single byte instruction, further 1 operation. 1 of the Accumulator. 1 interrupts are accepted. 1 instructionautomatically repeats the operation untilBC=0 and the whole block is transferred. 1 input port (0-255) 1 incrementing and repeating 1 incrementing 1 i.e. INI incrementing 1 i.e. -2 is equivalent to 254 etc. 1 exchanges BC,DE and HL, with 1 ectively multiplies a" 1 decrementing and repeating 1 decrementing 1 contents of the Accumulator by 1 complementing and adding 1 in one 1 are disabled at this time. 1 You are trying to run code in allocated storage area. RET missing? Please EDIT 1 You are about to write to memory which will affect your program. Please edit it. 1 You are about to affect memory area not allocated to you. Please edit program. 1 You should now be able to use otherassemblers to write your own programs.You will find that most are not souser friendly, and that you will notbe able to one step easily throughinstructions. Don't despair. You canalways return to this Tutor to simulateyour problem. 1 XOR (IX+d) 1 When performing arithmetic operationswhich we wish to interpret within therange -128 to +127, the Carry flag nolonger signals an out of range result.However another flag, the overflow (P/V)flag does. It is a "1" whenever the answeris outside the range -128 to +127 and "0"within the range. It is effectively acarry into bit 7 which would make the signbit incorrect. 1 We must return from an interrupt routinewith the instruction RETI ( RETurn from Interrupt ) and not RET. 1 We now introduce two new registers, theindex registers IX and IY. These tworegisters are identical in every way. Whatapplies to one applies to the other. 1 We can input data directly into theaccumulator with IN A,(n) where n is thenumber of the input port between O and255. Similarly we can output data from theAccumulator to port n using theinstruction OUT (n),A. No flags areaffected by these instructions 1 We can also input data to any 8 bitregister using the B and C registers. Theinstruction IN r,(C), transmits thecontents of the B register to the portwhose number is in the C register. Theport may or may not act upon thisinformation. The returned data from theport is loaded into register r. Readingthe Spectrum keyboard is interrogatedusing this instruction. 1 Transfers LD 1 To ensure that no other interrupt occursduring this period and therefore corruptsthe register contents before they aresafe, the interrupts are disabled duringthese operations. 1 This group of instructions, together withthe interrupt instructions, control theaction of the processor. 1 This completes a study of all theinstructions available on the Z80 chip. 1 They cannot be exchanged for HL if thatregister pair is only implied in theinstruction, i.e. RRD. 1 They can take the place of the HLregister in most instructions. It issimpler to list the instructions that canbe performed by the HL register but notindex registers:- 1 These instructions can be used also tofill a block of memory with a singlenumber. 1 There is no reason for sticking to 8 bitsusing this method. So long as the numberof bits is sufficient and the mostsignificant bit is taken as the sign bitany size positive or negative number canbe represented. 1 There are too many registers called up, to display. Program will RUN as normal. 1 There are only two more registers in theZ80 to discuss, the I or Interruptregister (see next lesson), and the R orRefresh register. 1 There are only two instructions involvingthe alternative registers. 1 There are four groups of four types ofinstructions that perform operations onblocks of memory. Since these instructionshave similarities, they are introducedtogether. 1 Their prime use on some systems isto allow external hardware to forcethe single byte instructions into theprocessor, thus making it think itsnext instruction is an RST n. It thereforeforms a method of interrupting theprocessor. (see the lesson on interrupts). 1 The two instructions that manipulate thisflag are 1 The total list is 1 The stack pointer is outside allocated memory area. Please edit program. 1 The program has been completed. You may EDIT or reRUN. Exit by pressing BREAK. 1 The power of these instructions is wellillustrated by the simple operation. 1 The last lessons deal with instructionsthat allow the outside world to interruptthe processor. 1 The important input port on the Spectrumis 254 ( FEH ), it is used for inputtingkeyboard data ( in bits 0-4 , bit 0 beingthe outside key ) and for cassette input. 1 The final set of lessons introduces morespecialised registers and instructions,and looks at the way the Z80 can talk withthe outside world. 1 The example shows the use of the Refreshregister as a source of random numbers. 1 The example uses the LDIR instructionto transfer the top third of the screen tothe middle of the screen. 1 The example uses the IX register as apointer to a table of two byte numbers.Each number is to be divided by 2. 1 The example loads all registers, thenswops them with the alternative set.Having re-loaded the registers a furtherswop returns the original numbers. 1 The colour screen is searched for thefirst blue and white character. In thesecond case the search is too short tofind a match. 1 The block instructions stop, not withthe pointer(s) pointing at the addressesjust operated on, but to those about tobe processed. Hence if equality is foundthey point to the next address and notthe memory location in which it was found. 1 The Zero flag indicates B=0 in thesecases 1 The Z80 has two instructions that may beused for these operations 1 The U in OUT is dropped to keep themnemonic to a maximum of 4 letters. 1 The Sign and overflow flags are alsooperative after ADC and SBC instruction onthe HL register. It reflects the 15th bit(or bit 7 of H register) . 1 The Refresh register is used by someforms of Random Access Memory whichrequire continuous writing to maintain itsinformation. The R register is incrementedautomatically every time the processorfetches each part of an instructionfrom memory. This provides the programmerwith a register whose contents may beconsidered random for some applications. 1 The R and I registers can be loaded fromthe Accumulator. The instructions involvedare simply LD A,R : LD R,A : LDA,I andLD I,A. 1 The OUT group is identical to the INgroup, but data from memory is output toport (C) in sequence from memorybeginning at location (HL) 1 The IN group of block instructionsinput data from the input port specifiedby the contents of the C register intoa block of memory starting at the addressheld in the HL register, the length ofwhich is in the B register. All forms ofIN apply:- 1 The B register is used as a counter asthe IN group. 1 The summary lists all instructionsavailable using the IX register. This listcan be repeated for the IY register. 1 The only instruction for which (HL)cannot be substituted by (IX+d) or (IY+d)is JP (HL). JP (IX) and JP (IY) areavailable however. 1 The interruptautomatically performs an RST or CALL toaddress 0066H on completion of the currentinstructions. The routine at 0066H isperformed. The instruction RETN or RETurnfrom Non-maskable interrupt returnscontrol back to the interrupted routine atits next instruction . 1 The great advantage of the indexregisters however is that indirectaddressing is not simply (HL) but (IX+d). The indirect address is calculated as thethe sum of the contents of the IX/IYregister and the offset d specifiedin the instruction. This offset can beany number between 0 and 255. 1 The Z80 has within the chip analternative set of the primary registersAF, BC, DE and HL. These are normallydesignated as AF', BC', DE' and HL'.Although no operations can be performed onthese registers, they can be used as afast method of storage. 1 Taking the initial conditions :- 1 Take the example of an LDIR instructionwith the registers initially set to:- 1 THE ALTERNATIVE SET OF REGISTERS 1 Summary - simple input/output 1 Summary - processor control instructions 1 Summary - index registers 1 Summary - block transfer 1 Summary - block search 1 So far we have manipulated data withinthe processor and its associated memory. Our Simulator examples have shownhow to write to the TV screen, (usingmemory locations 4000H to 5AFFH). Thistype of output is termed memory addressmapped since it looks like memory. The Z8Oalso supports 256 output and 256 inputports, or 8 bit information sources,external to memory. 1 Since all RST calls are to the beginningof memory (page 0) and this area on theSpectrum is ROM, all the calls have beendefined i.e. RST 00H is equivalent toNEW, that clears out all the memory andre-establishes the system. Needless tosay the simulator does not perform RSTinstructions. 1 SOURCE CODE 1 Return to operating system 1 Program stopped. You may re-RUN, EDIT or press BREAK to return to menu. 1 Program has successfully assembled. Press RUN, EDIT, or exit by pressing BREAK. 1 Program counter has jumped to non-valid address. EDIT or reRUN program. 1 Press SPACE to select and ENTER to start 1 Press SPACE to continue. 1 Press RUN to begin example, EDIT to edit, and BREAK to return to menu. 1 Please confirm disk loading required Y/N 1 Performing a similar calculation to theabove we can show that a register pair canrepresent a number in the range +32767 to-32768. 1 PROCESSOR CONTROL INSTRUCTIONS 1 Output port 254 is used to set the bordercolour ( bit 0-2 ), and output to cassette( bit 6 ). 1 Output OUT/OT..OUTI,OTDR,OUTD,OTDR 1 One Non-Maskable Interrupt is availableon the Z80 chip. 1 OUT (C), r is a similar instruction toIN r,(C), but the contents of the registerr is loaded into port (C). 1 NOP or No OPeration causes the processorto do nothing for one step. Since its codeis 0, a cleared memory area will besequenced through until a non-zeroinstruction is found. 1 NEG negates, or makes negative, the 1 Most of the instruction in this and thelast lesson involve steps that change theenvironment in which the processoroperates. It is therefore difficult tosimulate these instructions. Little can belearnt from single stepping through anexample. However changing interrupt modesetc. ( see next lesson ) on a PersonalComputer is advanced programming. Trygaining experience on machine codeprogramming before venturing into thisfield. 1 MODE 2 is the most flexible, the addressto which the processor is forced is theindirect address held in a memorylocation. The address of this memorylocation is computed from the contentof the I register, which provides thehigh byte and the interrupting devicewhich provides the low byte. Sincethe interrupt routine is addressedindirectly the interrupts are termedvectored interrupts. 1 MODE 1 is the one used by the Sinclairsystem ROM. It is set by the instructionIM 1. This mode is similar in operation tothe Non Maskable Interrupt except thatprocessor is restarted at 0038H insteadof 0066H as in the NMI. 1 MODE 0 is set by the instruction IM 0.This mode is the one described previously,where the RST n instruction is forced ontothe data highway to fool the processorinto performing the restart. 1 Loading lessons 26-35 1 Loading lessons 18-25 1 Loading lessons 10-17 1 Loading lessons 1-9 1 Loading has been stopped 1 Loading error 1 Load earlier lessons for revision 1 LOOP SRL (IX+1) 1 LOOP LD HL,5800H 1 LOOP LD C,FEH 1 LOOP LD B,32 1 LOOP LD A,R 1 LOOP EXX 1 LESSONS 26 - 35 1 LDIR is similar to LDI, transferring datafrom (HL) to (DE) and incrementing thepointers, 1 LDI transfers (HL) to (DE), incrementsboth pointers, and decrements BC. If BC=0the P/V flag is 0 (i.e. equivalent toparity being odd ). If BC does not = 0the P/V flag is 1 ( parity even ). LDItherefore performs only one step of thetransfer of the block, allowingintermediate operations to be performedbefore the instruction is repeated. 1 LDDR Repeats LDD until BC=0 as in theLDIR instruction. 1 LDD is similar to LDI except the pointersare Decremented. Thus HL and DE start atthe top of the respective blocks ofmemory. 1 LD HL,4000H 1 LD BC,100H 1 It is important to remember that the ZeroCarry, Sign, and overflow flags are alwaysoperative after an 8 bit arithmeticinstruction or a 16 bit addition involvingthe Carry. Your interpretation of theresult determines which flag(s) you shouldbe interested in. 1 It is easier to use the index registersto interrogate tables than using HL. Theoffset can define the column in the tableand IX/IY register point to the beginningof the line. A subroutine could manipulatethe data within the line, using a constantIX/IY pointer. Subsequent lines can thenbe manipulated simply by using the samesubroutine and changing the IX/IY registerto point to a different line. 1 Interrupts fall into two types, Non-Maskable Interrupts (NMI) and MaskableInterrupts (MI). Maskable interrupt can beignored by the software, but NMIs cannot. 1 In general, if the two blocks overlap usethe instruction that ensures the initialfigure in the HL register lies within theblock to which data is to be transferred. 1 ITEM1 DEFW 560 1 INTRODUCTION 1 INTERRUPTS 1 INPUT AND OUTPUT INSTRUCTIONS 1 INIR incrementing and repeating 1 INDR decrementing and repeating 1 INDEX REGISTERS 1 IND decrementing 1 IN r, (C) affect the Zero, Sign, andParity flags. The instruction IN F, (C) isthe only instruction that deals with theFlag register separately. Only the flagsare affected by this instruction and nodata is transferred into the processor. 1 Hence interrupt routine take the form:- 1 HALT stops the sequencing of theprocessor until an interrupt is received( see next lesson ). After the interrupthas been dealt with, the instruction afterthe HALT is performed. Thus the programcan be synchronised with operationsoutside the processor. 1 Ex - using alternative set 1 Ex - use of index registers 1 Ex - control instructions 1 Ex - block transfer 1 Ex - block search 1 Ex - block I/O 1 Ex - I/O instructions 1 Entry into a maskable interruptautomatically disables interrupt. 1 Each time the program loops round press adifferent key between "H" and "ENTER" toinput a different number. Setting C to BFHinterrogates keys in this range. SeeManual. 1 EXAMPLES OF +VE AND -VE NOTATION 1 EXAMPLE USING THE ALTERNATIVE SET 1 EXAMPLE OF USE OF INDEX REGISTER 1 EXAMPLE OF BLOCK TRANSFER 1 EXAMPLE OF BLOCK SEARCH 1 EXAMPLE OF BLOCK INPUT 1 EX AF,AF' exchanges the contents of AF 1 EI Enable Interrupts. After one more 1 Disk V1.0 (c) HanSoft '85 1 DI Disable Interrupts immediately. 1 Compare CP 1 CPL complements or inverts the contents 1 Both pairs of instructions ( LDIR andLDDR) are required. 1 Block transfer instructions transfer thecontents of an area of memory to anotherarea. Two pointers are used. The HLregister holds the source address and theDE register the destination address. Thesize of the block to be transferred isheld in the BC register. 1 Because a repeated block input is sofast the whole block of memory is likelyto be filled with the single key press.It does however illustrate the operation. Try different keys as before. 1 BLOCK TRANSFER INSTRUCTIONS 1 BLOCK SEARCH 1 BLOCK INSTRUCTIONS 1 BLOCK INPUT/OUTPUT INSTRUCTIONS 1 BC', DE' and HL' respectively. 1 As well as the standard CALL instructionsthat incorporate the address to which theprocessor is to jump, the Z80 hasinstructions in which the address of theCALL is implied. The instructions RST n(where n=00H, 08H, 10H, 18H, 20H, 28H, 30Hor 38H ) calls the routine at 00n hexdirectly. i.e. RST 28H is equivalent toCALL 0028H. 1 As you may now be able to infer, the CPgroup Compares the content of memorylocations in a block of memory with apredetermined number. HL holds thepointer and the BC register the lengthof the block to be searched. TheAccumulator holds the number for whichthe instruction will search. If thenumber is found then the Zero flag isset. As before the P/V flag indicateswhether BC=0. 1 An interrupt originates from outside theprocessor, requesting it to break off itscurrent sequence of operations and dealwith some other function. 1 An interrupt can occur at any time.It follows therefore that if theinterrupted program is to be continued(i.e. be re entered), the contents of anyregister that the interrupt routine uses,must be stored or pushed onto the stack,and reloaded or POPped from the stackbefore returning 1 Although these examples appear to be allpositive, they can be viewed equally asnegative where appropriate and the Signand overflow flags observed operating.Remember a number above 128 is a negativenumber. Since all the negative numbers inthe examples are small, they can be seenquickly and simply be converted bysubtracting the number from 256. 1 All block instructions use register(s)as a pointer(s) to scan though a blockof memory and another as a counter. 1 All block instructions have similarmnemonics. I indicates that thepointer(s) are Incremented, D thatthe pointer(s) are Decremented, and Rthat the instruction is to be repeateduntil the counter is zero. 1 A Sign flag (S) is provided on the Z80.It duplicates the sign ( bit 7 ) of theanswer after any arithmetic operation onthe Accumulator. The sign flag is "0" fora positive result and "1" for a negativeresult. 1 35. Finale 1 34. Interrupts 1 33. Processor control instructions 1 32. Block I/O instructions 1 31. Block search instructions 1 30. Block tranfer instructions 1 29. Block instructions - introduction 1 28H, 30H, or 38H. 1 28. Input/Output instructions 1 27. The alternative set of registers 1 26. The index registers 1 & clears all ENTER tabs to next line STOP assembles SPACE tabs in label are 1 RR (IX+0) 1 OUT (C),D 1 OUT (254),A 1 Loading error 1 LD IX,ITEM1 1 LD HL,64000 1 LD HL,581FH 1 LD HL,5800H 1 LD HL,32100 1 LD DE,FFFEH 1 LD DE,8000 1 LD DE,4800H 1 LD DE,200 1 LD C,FEH 1 LD C,254 1 LD BC,800H 1 LD BC,1280 1 LD BC,10H 1 LD BC,1024 1 LD B,20H 1 LD (HL),0 1 JR NZ,LOOP 1 IN A,(C) 1 Error found during assembly. Please correct before running program. 1 DEFW 9634 1 DEFW 884 1 DEFW 5937 1 DEFW 187 1 ADD HL,DE 1 GOOD LUCK and HAPPY PROGRAMMING 1 EXAMPLES OF INPUT/OUTPUT INSTRUCTIONS 1 ASSEMBLED CODE LABELS INSTRUCTIONS 1 Enter the Z-80 simulator ? Y/N 1 EXAMPLE OF USE OF REFRESH REGISTER